This architecture has an 8-bit memory. It consist of 4-bit PC (Program Counter) which is part of Control Unit that counts from 0000 to 1111 in binary form and its job is to send the address to the memory. 8-bit IR (Instruction Register) is also a part of the Control Unit which contents of the instruction register that are split into two nibbles; the upper and lower nibbles. SAP 1 has a RAM (Random Access Memory) that allows to store data in memory before a computer or a program runs. SAP 1 can only perform two logical operation; addition and subtraction. Its uses 2's complement, 8-bit adder-subtracter unit. SAP 1 architecture has a controller/sequencer that controls the operation of the computer. Every computer operates in what we call instruction cycle, or fetch/execute cycle: Fetch get an instruction from the memory and Execute perform the instruction. SAP 1 architecture has only five instruction set; LDA (Load Accumulator), ADD (Addition), SUB (Subtraction), OUT (Output) and HLT (Halt). ADD instruction will add the contents of the Accumulator to the contents of memory in the address, placing the sum back into the Accumulator.
In relation with the early microcomputer design they are the same 8-bit of memory and 8-bit bus for data and address transfer.
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